Please use this identifier to cite or link to this item: https://hdl.handle.net/10216/84054
Author(s): José M. Ferreira
Manuel G. Gericota
Luís F. Lemos
Gustavo R. Alves
Mário M. Barbosa
Title: A framework for fault tolerant real time systems based on reconfigurable FPGAs
Issue Date: 2006-09
Abstract: To increase the amount of logic available to the usersin SRAM-based FPGAs, manufacturers are usingnanometric technologies to boost logic density andreduce costs, making its use more attractive. However,these technological improvements also make FPGAsparticularly vulnerable to configuration memory bit-flipscaused by power fluctuations, strong electromagneticfields and radiation. This issue is particularly sensitivebecause of the increasing amount of configurationmemory cells needed to define their functionality.A short survey of the most recent publications ispresented to support the options assumed during thedefinition of a framework for implementing circuitsimmune to bit-flips induction mechanisms in memorycells, based on a customized redundant infrastructureand on a detection-and-fix controller.
Subject: Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
Scientific areas: Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática
Engineering and technology::Electrical engineering, Electronic engineering, Information engineering
URI: https://repositorio-aberto.up.pt/handle/10216/84054
Source: 2006 IEEE CONFERENCE ON EMERGING TECHNOLOGIES & FACTORY AUTOMATION, VOLS 1 -3
Document Type: Artigo em Livro de Atas de Conferência Internacional
Rights: openAccess
License: https://creativecommons.org/licenses/by-nc/4.0/
Appears in Collections:FEUP - Artigo em Livro de Atas de Conferência Internacional

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