Please use this identifier to cite or link to this item: https://hdl.handle.net/10216/85053
Author(s): Manuel Gericota
Gustavo Costa Alves
Miguel L. Silva
José Martins Ferreira
Title: DRAFT: An On-line Concurrent Test for Partial and Dynamically Reconfigurable FPGAs
Issue Date: 2001
Abstract: The use of partial and dynamically reconfigurable FPGAs in reconfigurable systems opens exciting possibilities, since they enable the concurrent reconfiguration of part of the system without interrupting its operation. Nevertheless, larger dies and the use of smaller submicron scales in the manufacturing of this new kind of FPGAs increase the probability of failures after many reconfiguration processes. New methods of test and fault tolerance are therefore required, capable of ensuring system reliability.This paper presents improvements to our RaT Freed Resources technique, a structural concurrent test approach able to detect and diagnose faults without disturbing system operation, throughout its lifetime.
Subject: Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
Scientific areas: Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática
Engineering and technology::Electrical engineering, Electronic engineering, Information engineering
URI: https://repositorio-aberto.up.pt/handle/10216/85053
Source: Proceedings of the Design of Circuits and Integrated Systems conference DCIS-01
Document Type: Artigo em Livro de Atas de Conferência Internacional
Rights: openAccess
License: https://creativecommons.org/licenses/by-nc/4.0/
Appears in Collections:FEUP - Artigo em Livro de Atas de Conferência Internacional

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