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Author(s): Manuel G. Gericota
Gustavo R. Alves
Miguel L. Silva
J. M. Martins Ferreira
Title: Concurrent replication of active logic blocks: a core solution for online testing and logic space defragmentation in reconfigurable systems
Issue Date: 2003
Abstract: Partial and dynamically reconfigurable SRAM-based FPGAs (Field Programmable Gate Arrays) enable the implementationof reconfigurable systems hosting several applications simultaneously, which share the available resources according to thefunctional requirements that are present at any given moment. Time and space sharing strategies enabled the concept ofvirtual hardware, supporting the concurrent implementation of applications which would otherwise require far morecomplex resources. However, the performance of these applications (e.g. execution speed and reliability, activation delay)is directly influenced by the efficiency of the management strategies that allocate the logic space to the various functionsthat are waiting to be activated (each function requiring a specific amount of logic resources). Because the activationrequests are in most cases not predictable, all resource allocation decisions have to be made online. The consequences ofsuch working contexts are twofold: All FPGA resources must be tested regularly, to exclude malfunctioning due to the allocation of faulty elements. Sincethe process of launching / halting active functions takes place asynchronously at any given moment, an onlineconcurrent test scheme is the only way of ensuring reliable system operation and predictable fault detection latency; As the resources are allocated to functions and later released, many small islands of free resources are created. Ifthese areas become too small, they will be left unused due to routing restrictions. The defragmentation of the FPGAlogic space must therefore be carried out regularly, to avoid the wasting of logic resources.This paper presents a non-intrusive solution for the concurrent replication of active logic blocks (i.e. logic blocks that arebeing used to implement part of an active function), transferring their functionality to fault-free resources that are availablein the FPGA logic space.This replication scheme is then used as the core of an online concurrent test strategy that scans the complete FPGA, reusingthe available 1149.1 test infrastructure to carry out a structural test of each logic block that has just been released. Theoverhead of the proposed solution, in terms of the number of configurable logic resources required for its implementation,as well as its performance (e.g. the resulting fault detection latency), are quantified.Further to the test aspects, an online concurrent defragmentation strategy based on the same replication scheme is alsoproposed. A rearrangement of the available logic space is carried out by selectively releasing active logic blocks, with theobjective of enforcing the adjacency of those blocks that share the implementation of a common function, and the creationof wider pools of logic resources that may be used to implement new functions.
Subject: Ciências da engenharia e tecnologias
Engineering and technology
Scientific areas: Ciências da engenharia e tecnologias
Engineering and technology
Source: DAK-Forum 2003
Document Type: Artigo em Livro de Atas de Conferência Internacional
Rights: openAccess
Appears in Collections:FEUP - Artigo em Livro de Atas de Conferência Internacional

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