Please use this identifier to cite or link to this item:
https://hdl.handle.net/10216/83590| Author(s): | Ali Azarian |
| Title: | Task-Level Pipelining in Configurable Multicore Architectures |
| Issue Date: | 2016-05-03 |
| Subject: | Engenharia electrotécnica, electrónica e informática Electrical engineering, Electronic engineering, Information engineering |
| Scientific areas: | Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática Engineering and technology::Electrical engineering, Electronic engineering, Information engineering |
| DOI: | 10.34626/mqrd-f561 |
| TID identifier: | 101437285 |
| URI: | https://hdl.handle.net/10216/83590 |
| Document Type: | Tese |
| Rights: | openAccess |
| License: | https://creativecommons.org/licenses/by-nc/4.0/ |
| Appears in Collections: | FEUP - Tese |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 128781.pdf | Task-Level Pipelining in Configurable Multicore Architectures | 4.44 MB | Adobe PDF |  View/Open |
This item is licensed under a Creative Commons License
