Please use this identifier to cite or link to this item: https://hdl.handle.net/10216/71532
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dc.creatorJosé Machado da Silva
dc.creatorPedro Mota
dc.creatorGabriel Pinho
dc.date.accessioned2022-09-07T02:36:11Z-
dc.date.available2022-09-07T02:36:11Z-
dc.date.issued2006
dc.identifier.othersigarra:60949
dc.identifier.urihttps://hdl.handle.net/10216/71532-
dc.description.abstractOne can find today system-on-chip devices comprising also radio-frequency blocks. These highly integrated circuits raise extraordinary challenges for testing, jeopardizing the low cost requirements associated often to these products. A built-in self test scheme for RF power ampli- fiers based on a polynomial fitting approach is proposed here, which takes advantage of the existing local oscillator, up-conversion mixer, and pre-driver, allowing for low area overhead and performance degradation. Simulation and experimental results for gain and linearity (1 dB compression and third order interception points) obtained with a GaAs distributed amplifier are presented which confirm the validity of the method. The BIST scheme proposed for implementing this method on-chip is then described, together with preliminary simulation results.
dc.language.isoeng
dc.relation.ispartofXXI Design of Circuits and Integrated Systems Conference
dc.rightsopenAccess
dc.rights.urihttps://creativecommons.org/licenses/by-nc/4.0/
dc.subjectOutras ciências da engenharia e tecnologias
dc.subjectOther engineering and technologies
dc.titleA BIST Scheme for RF Power Amplifiers
dc.typeArtigo em Livro de Atas de Conferência Internacional
dc.contributor.uportoFaculdade de Engenharia
dc.subject.fosCiências da engenharia e tecnologias::Outras ciências da engenharia e tecnologias
dc.subject.fosEngineering and technology::Other engineering and technologies
Appears in Collections:FEUP - Artigo em Livro de Atas de Conferência Internacional

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