Please use this identifier to cite or link to this item:
https://hdl.handle.net/10216/70151
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.creator | Miguel L. Silva | |
dc.creator | João Canas Ferreira | |
dc.date.accessioned | 2022-09-11T23:58:09Z | - |
dc.date.available | 2022-09-11T23:58:09Z | - |
dc.date.issued | 2005 | |
dc.identifier.other | sigarra:54045 | |
dc.identifier.uri | https://hdl.handle.net/10216/70151 | - |
dc.description.abstract | This paper describes a tool that creates partially-reconfigurable modules from the bitstreams of individual component modules. The resulting modules are intended for use in applications that exploit partial dynamic reconfiguration. The tool is integrated in a design flow particularly aimed at dynamically-reconfigurable platform FPGAs. The corresponding design flow is described together with a basic run-time support system. | |
dc.language.iso | eng | |
dc.relation.ispartof | Proceedings of the XX Conference on Design of Circuits and Integrated Systems | |
dc.rights | openAccess | |
dc.rights.uri | https://creativecommons.org/licenses/by-nc/4.0/ | |
dc.subject | Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática | |
dc.subject | Electrical engineering, Electrical engineering, Electronic engineering, Information engineering | |
dc.title | Generation of hardware modules for run-time reconfigurable hybrid CPU/FPGA systems | |
dc.type | Artigo em Livro de Atas de Conferência Internacional | |
dc.contributor.uporto | Faculdade de Engenharia | |
dc.identifier.doi | 10.1049/iet-cdt:20060056 | |
dc.subject.fos | Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática | |
dc.subject.fos | Engineering and technology::Electrical engineering, Electronic engineering, Information engineering | |
Appears in Collections: | FEUP - Artigo em Livro de Atas de Conferência Internacional |
This item is licensed under a Creative Commons License