Utilize este identificador para referenciar este registo: https://hdl.handle.net/10216/70151
Registo completo
Campo DCValorIdioma
dc.creatorMiguel L. Silva
dc.creatorJoão Canas Ferreira
dc.date.accessioned2022-09-11T23:58:09Z-
dc.date.available2022-09-11T23:58:09Z-
dc.date.issued2005
dc.identifier.othersigarra:54045
dc.identifier.urihttps://hdl.handle.net/10216/70151-
dc.description.abstractThis paper describes a tool that creates partially-reconfigurable modules from the bitstreams of individual component modules. The resulting modules are intended for use in applications that exploit partial dynamic reconfiguration. The tool is integrated in a design flow particularly aimed at dynamically-reconfigurable platform FPGAs. The corresponding design flow is described together with a basic run-time support system.
dc.language.isoeng
dc.relation.ispartofProceedings of the XX Conference on Design of Circuits and Integrated Systems
dc.rightsopenAccess
dc.rights.urihttps://creativecommons.org/licenses/by-nc/4.0/
dc.subjectEngenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
dc.subjectElectrical engineering, Electrical engineering, Electronic engineering, Information engineering
dc.titleGeneration of hardware modules for run-time reconfigurable hybrid CPU/FPGA systems
dc.typeArtigo em Livro de Atas de Conferência Internacional
dc.contributor.uportoFaculdade de Engenharia
dc.identifier.doi10.1049/iet-cdt:20060056
dc.subject.fosCiências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática
dc.subject.fosEngineering and technology::Electrical engineering, Electronic engineering, Information engineering
Aparece nas coleções:FEUP - Artigo em Livro de Atas de Conferência Internacional

Ficheiros deste registo:
Ficheiro Descrição TamanhoFormato 
54045.pdfDCIS 2005276.7 kBAdobe PDFThumbnail
Ver/Abrir


Este registo está protegido por Licença Creative Commons Creative Commons