Please use this identifier to cite or link to this item: https://hdl.handle.net/10216/162341
Author(s): Renato Pedrosa de Jesus
Title: Evaluating High-Level SystemC Formal Verification Compared to RTL Verification
Issue Date: 2024-10-08
Subject: Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
Scientific areas: Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática
Engineering and technology::Electrical engineering, Electronic engineering, Information engineering
DOI: 10.34626/4npg-gc66
TID identifier: 203861302
URI: https://hdl.handle.net/10216/162341
Document Type: Dissertação
Rights: openAccess
Appears in Collections:FEUP - Dissertação

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