Please use this identifier to cite or link to this item:
https://hdl.handle.net/10216/89412| Author(s): | Manuel José Santos Oliveira |
| Title: | A SysML-based Design Flow for Digital VLSI Circuits |
| Issue Date: | 2015-07-17 |
| Subject: | Ciências da engenharia e tecnologias Engineering and technology |
| Scientific areas: | Ciências da engenharia e tecnologias Engineering and technology |
| DOI: | 10.34626/8wf0-nd46 |
| TID identifier: | 201312050 |
| URI: | https://hdl.handle.net/10216/89412 |
| Document Type: | Dissertação |
| Rights: | openAccess |
| Appears in Collections: | FEUP - Dissertação |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 35523.pdf | A SysML-based Design Flow for Digital VLSI Circuits | 11.54 MB | Adobe PDF |  View/Open |
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