Please use this identifier to cite or link to this item: https://hdl.handle.net/10216/84075
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dc.creatorJosé Manuel Martins Ferreira
dc.creatorUkbagiorgis Iyasu Gebremeskel
dc.date.accessioned2019-05-30T23:07:08Z-
dc.date.available2019-05-30T23:07:08Z-
dc.date.issued2014-07
dc.identifier.othersigarra:136028
dc.identifier.urihttps://hdl.handle.net/10216/84075-
dc.description.abstractThis paper describes a microprogrammed architecture for an embedded coprocessor that is ableto control IEEE 1149.1 to IEEE 1149.7 test infrastructures, and explains how to expand the supportedtest command set. The coprocessor uses a fast simplex link (FSL) channel to interface a32-bit MicroBlaze CPU, but it can work with any microprocessor core that accepts this simpleFIFO-based interface method. The implementation cost (logic resource usage for a Xilinx Spartan6FPGA) and the performance data (operating frequency) are presented for a test command setcomprising two parts: 1) the full IEEE 1149.1 structural test operations; 2) a subset of IEEE 1149.7operations selected to illustrate the implementation of advanced scan formats.
dc.language.isoeng
dc.rightsopenAccess
dc.rights.urihttps://creativecommons.org/licenses/by-nc/4.0/
dc.subjectEngenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
dc.subjectElectrical engineering, Electrical engineering, Electronic engineering, Information engineering
dc.titleAn IEEE 1149.x Embedded Test Coprocessor
dc.typeArtigo em Revista Científica Internacional
dc.contributor.uportoFaculdade de Engenharia
dc.identifier.doi10.4236/cs.2014.57019
dc.subject.fosCiências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática
dc.subject.fosEngineering and technology::Electrical engineering, Electronic engineering, Information engineering
Appears in Collections:FEUP - Artigo em Revista Científica Internacional

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