Please use this identifier to cite or link to this item:
https://hdl.handle.net/10216/169638| Author(s): | João Pedro Reis Teixeira |
| Title: | Hardware Accelerated Edge Inference of Small Language Models on FPGA |
| Issue Date: | 2025-09-19 |
| Subject: | Engenharia electrotécnica, electrónica e informática Electrical engineering, Electronic engineering, Information engineering |
| Scientific areas: | Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática Engineering and technology::Electrical engineering, Electronic engineering, Information engineering |
| TID identifier: | 204115159 |
| URI: | https://hdl.handle.net/10216/169638 |
| Document Type: | Dissertação |
| Rights: | openAccess |
| Appears in Collections: | FEUP - Dissertação |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 742955.pdf | Hardware Accelerated Edge Inference of Small Language Models on FPGA | 2.63 MB | Adobe PDF |  View/Open |
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