Please use this identifier to cite or link to this item: https://hdl.handle.net/10216/160847
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dc.creatorMaria João Garcia Alves
dc.date.accessioned2025-11-09T00:26:11Z-
dc.date.available2025-11-09T00:26:11Z-
dc.date.issued2024-07-22
dc.date.submitted2024-08-08
dc.identifier.othersigarra:681547
dc.identifier.urihttps://hdl.handle.net/10216/160847-
dc.language.isoeng
dc.rightsembargoedAccess
dc.subjectEngenharia electrotécnica, electrónica e informática
dc.subjectElectrical engineering, Electronic engineering, Information engineering
dc.titleDesign of a CMOS Neuromorphic Computational Core with Dynamic Analog RAM for Synapse
dc.typeDissertação
dc.date.embargo2027-07-21
dc.contributor.uportoFaculdade de Engenharia
dc.identifier.doi10.34626/3skx-sm33
dc.identifier.tid203859960
dc.subject.fosCiências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática
dc.subject.fosEngineering and technology::Electrical engineering, Electronic engineering, Information engineering
thesis.degree.disciplineMestrado em Engenharia Eletrotécnica e de Computadores
thesis.degree.grantorFaculdade de Engenharia
thesis.degree.grantorUniversidade do Porto
thesis.degree.level1
rcaap.embargofctPreparação de Publicação.
Appears in Collections:FEUP - Dissertação

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