An Exploration of FPGAs as Accelerators for Graph Analysis via High-Level Synthesis

Please use this identifier to cite or link to this item: https://hdl.handle.net/10216/137155

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DC Field	Value	Language
dc.creator	Pedro Filipe Vilhena de Campos Oliveira e Silva
dc.date.accessioned	2025-11-08T17:09:28Z	-
dc.date.available	2025-11-08T17:09:28Z	-
dc.date.issued	2021-01-14
dc.date.submitted	2021-11-09
dc.identifier.other	sigarra:511069
dc.identifier.uri	https://hdl.handle.net/10216/137155	-
dc.language.iso	eng
dc.rights	openAccess
dc.subject	Engenharia electrotécnica, electrónica e informática
dc.subject	Electrical engineering, Electronic engineering, Information engineering
dc.title	An Exploration of FPGAs as Accelerators for Graph Analysis via High-Level Synthesis
dc.type	Dissertação
dc.contributor.uporto	Faculdade de Engenharia
dc.identifier.doi	10.34626/v6ev-4g79
dc.identifier.tid	202828000
dc.subject.fos	Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática
dc.subject.fos	Engineering and technology::Electrical engineering, Electronic engineering, Information engineering
thesis.degree.discipline	Mestrado Integrado em Engenharia Informática e Computação
thesis.degree.grantor	Faculdade de Engenharia
thesis.degree.grantor	Universidade do Porto
thesis.degree.level	1
Appears in Collections:	FEUP - Dissertação

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