Please use this identifier to cite or link to this item: https://hdl.handle.net/10216/122471
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dc.creatorTiago da Costa Abreu
dc.date.accessioned2025-11-06T03:49:46Z-
dc.date.available2025-11-06T03:49:46Z-
dc.date.issued2019-07-03
dc.date.submitted2019-09-28
dc.identifier.othersigarra:353850
dc.identifier.urihttps://hdl.handle.net/10216/122471-
dc.descriptionNowadays, the increased complexity of analog/digital circuits and the extremelly wide range of specifications tend to change how an integrated-circuit designer addresses circuit optimization. A traditional analog engineer likes to use some intuition when designing circuits, as a second step following paper-pencil analysis. However, the numerous parameters that influence the circuit IV in modern transistors do not provide good guesses. Moreover, an optimization based on multiple parameter sweep helps only when the design space is reduced, which is not the case in modern designs. The present thesis, developed at INTEL (in Munich site, Germany), addresses new paradigms of circuit optimization. The proposed work relies on the use of machine learning techniques applied to the design of complex CMOS systems.
dc.language.isoeng
dc.rightsopenAccess
dc.subjectEngenharia electrotécnica, electrónica e informática
dc.subjectElectrical engineering, Electronic engineering, Information engineering
dc.titleOptimization Design Flow of Integrated Circuits based on Machine Learning Approaches
dc.typeDissertação
dc.contributor.uportoFaculdade de Engenharia
dc.identifier.doi10.34626/4gn6-9102
dc.identifier.tid202398137
dc.subject.fosCiências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática
dc.subject.fosEngineering and technology::Electrical engineering, Electronic engineering, Information engineering
thesis.degree.disciplineMestrado Integrado em Engenharia Electrotécnica e de Computadores
thesis.degree.grantorFaculdade de Engenharia
thesis.degree.grantorUniversidade do Porto
thesis.degree.level1
Appears in Collections:FEUP - Dissertação

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