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dc.creatorDaniel Miranda Silva Malafaia Granhão
dc.description.abstractThe possibility of accelerating software using dedicated hardware is one of the advantages that heterogeneous computing platforms provide, and can greatly increase computing efficiency. Despite being more efficient, applications need to be rewritten to effectively exploit the dedicated accelerators, using a complex and tedious process. The goal of this work is to research transparent mechanisms that would allow the transfer of the control flow between a CPU and an FPGA, which houses an accelerator. Such a mechanism could be coupled with transparent software profiling and translation to hardware, which would allow for regular software to take advantage of hardware acceleration in a transparent manner. Implementation is done over Intel's new Xeon+FPGA hybrid platform which combines a Xeon processor and an Arria 10 FPGA in the same package while sharing the main system memory. A prototype was achieved and tested on real hardware, in which the Linux ptrace system call is used to control the process to be accelerated and transfer its execution between the CPU and the FPGA. An AES encryption kernel was accelerated and speedups of 8x were recorded when large data sizes were used.
dc.subjectEngenharia electrotécnica, electrónica e informática
dc.subjectElectrical engineering, Electronic engineering, Information engineering
dc.titleTransparent control flow transfer between CPU and Intel FPGAs
dc.contributor.uportoFaculdade de Engenharia
dc.subject.fosCiências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática
dc.subject.fosEngineering and technology::Electrical engineering, Electronic engineering, Information engineering Integrado em Engenharia Electrotécnica e de Computadores de Engenharia do Porto
Appears in Collections:FEUP - Dissertação

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