Please use this identifier to cite or link to this item: https://hdl.handle.net/10216/118910
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dc.creatorAlexandre Carvalho Truppel
dc.date.accessioned2025-11-10T16:29:19Z-
dc.date.available2025-11-10T16:29:19Z-
dc.date.issued2018-07-18
dc.date.submitted2018-07-31
dc.identifier.othersigarra:277392
dc.identifier.urihttps://hdl.handle.net/10216/118910-
dc.descriptionOptical Networks-on-Chip are a promising solution for high-performance multi-core integration with better latency and bandwidth than traditional Electrical NoCs. Wavelength-routed ONoCs offer yet additional performance guarantees. However, WRONoC design presents new EDA challenges which have not yet been fully addressed. So far, most topology analysis is abstract, i.e., overlooks layout concerns, while for layout the tools available perform P&R but no topology optimization. Thus, a need arises for a novel optimization method combining both aspects of WRONoC design. In this thesis such a method is proposed and compared to the state of the art design procedure. Results available so far show a remarkable 50% reduction in maximum insertion loss with this new approach.
dc.language.isoeng
dc.rightsopenAccess
dc.subjectEngenharia electrotécnica, electrónica e informática
dc.subjectElectrical engineering, Electronic engineering, Information engineering
dc.titleLayout aware router design and optimization for Wavelength-Routed Optical NoCs
dc.typeDissertação
dc.contributor.uportoFaculdade de Engenharia
dc.identifier.doi10.34626/dje5-sz21
dc.identifier.tid202111920
dc.subject.fosCiências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática
dc.subject.fosEngineering and technology::Electrical engineering, Electronic engineering, Information engineering
thesis.degree.disciplineMestrado Integrado em Engenharia Electrotécnica e de Computadores
thesis.degree.grantorFaculdade de Engenharia
thesis.degree.grantorUniversidade do Porto
thesis.degree.level1
Appears in Collections:FEUP - Dissertação

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