Configurable coarse-grained array architecture for processing of biological signals

João Pedro Sauvarin Lopes

doi:10.34626/mh5s-3403

Please use this identifier to cite or link to this item: https://hdl.handle.net/10216/105391

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DC Field	Value	Language
dc.creator	João Pedro Sauvarin Lopes
dc.date.accessioned	2025-11-04T19:54:06Z	-
dc.date.available	2025-11-04T19:54:06Z	-
dc.date.issued	2017-07-04
dc.date.submitted	2017-07-17
dc.identifier.other	sigarra:200602
dc.identifier.uri	https://hdl.handle.net/10216/105391	-
dc.description	With the emerging interest in low power biological signal monitoring, the market for small, low power, highly integrated solutions for signal acquisition and processing has grown substantially. This project is inserted in one such solution, a low profile, wearable device capable of acquiring, analysing and transmitting data. Applications range from health and sports monitoring to clinical applications for short term study or long term monitoring. This kind of device is particularly interesting as it allows patients to be free and active while being monitored, improving the value of the results and potentially reducing the cost of health care. This dissertation is focused on studying CGRA (coarse-grained reconfigurable array) architectures for this application domain. By using a small array of interconnected prepossessing elements one can leverage both parallelization and pipelining to efficiently process substantial amount of data. Reaching an appropriate architecture requires the study of the trade-offs between functionality, versatility, throughput and energy consumption for this type of processing. The result from this analysis is an accelerator architecture to be inserted in a larger project named NanoStima.
dc.language.iso	eng
dc.rights	openAccess
dc.subject	Engenharia electrotécnica, electrónica e informática
dc.subject	Electrical engineering, Electronic engineering, Information engineering
dc.title	Configurable coarse-grained array architecture for processing of biological signals
dc.type	Dissertação
dc.contributor.uporto	Faculdade de Engenharia
dc.identifier.doi	10.34626/mh5s-3403
dc.identifier.tid	201799421
dc.subject.fos	Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática
dc.subject.fos	Engineering and technology::Electrical engineering, Electronic engineering, Information engineering
thesis.degree.discipline	Mestrado Integrado em Engenharia Electrotécnica e de Computadores
thesis.degree.grantor	Faculdade de Engenharia
thesis.degree.grantor	Universidade do Porto
thesis.degree.level	1
Appears in Collections:	FEUP - Dissertação

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