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https://hdl.handle.net/10216/96200
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DC Field | Value | Language |
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dc.creator | Carlos Morra | |
dc.creator | João M. P. Cardoso | |
dc.creator | João Bispo | |
dc.creator | Jürgen Becker | |
dc.date.accessioned | 2022-09-09T14:16:59Z | - |
dc.date.available | 2022-09-09T14:16:59Z | - |
dc.date.issued | 2008 | |
dc.identifier.other | sigarra:67908 | |
dc.identifier.uri | https://hdl.handle.net/10216/96200 | - |
dc.description.abstract | Coarse-grained reconfigurable architectures have proven their value as programmable accelerators for general purpose processors. For early evaluation of those architectures, we need an approach able to exploit and retarget different Processing Elements (PEs) while maintaining the same compilation flow. Bearing in mind those aspects, this paper describes an approach able to map, evaluate and generate reconfigurable architectures based on an array of PEs. We use Rewriting Logic to map computations described by imperative programming languages to the PEs of the target architecture, a VHDL generation step to prototype the architectures being evaluated, and a clock cycle-based simulator to achieve first assessments about the performance of those architectures. In order to show the potential of our approach, we present results of 1-D coarse-grained reconfigurable arrays as accelerator softcores implemented in an FPGA, and the effects of different PE's structures and complexities. | |
dc.language.iso | eng | |
dc.relation.ispartof | 2008 SYMPOSIUM ON APPLICATION SPECIFIC PROCESSORS | |
dc.rights | restrictedAccess | |
dc.subject | Engenharia de computadores, Engenharia electrotécnica, electrónica e informática | |
dc.subject | Computer engineering, Electrical engineering, Electronic engineering, Information engineering | |
dc.title | Retargeting, evaluating, and generating reconfigurable array-based architectures | |
dc.type | Artigo em Livro de Atas de Conferência Internacional | |
dc.contributor.uporto | Faculdade de Engenharia | |
dc.identifier.doi | 10.1109/sasp.2008.4570783 | |
dc.identifier.authenticus | P-007-NH2 | |
dc.subject.fos | Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática | |
dc.subject.fos | Engineering and technology::Electrical engineering, Electronic engineering, Information engineering | |
Appears in Collections: | FEUP - Artigo em Livro de Atas de Conferência Internacional |
Files in This Item:
File | Description | Size | Format | |
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67908.pdf Restricted Access | 185.35 kB | Adobe PDF | Request a copy from the Author(s) |
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