Please use this identifier to cite or link to this item:
https://hdl.handle.net/10216/85051| Author(s): | Gustavo R. Alves Telmo Pedro Gomes Amaral José M. Martins Ferreira |
| Title: | A Framework for System-Level Co-Verification Using the BST Infrastructure |
| Issue Date: | 1999 |
| Abstract: | A good verification strategy should bring near the simulation and real functioning environments. In this paper we describe a system-level co-verification strategy that uses a common flow for functional simulation, timing simulation and functional debug. This last step requires the use of a BST infrastructure, now widely available on commercial devices, specially on programmable devices with medium / large pin-counts. |
| Subject: | Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática Electrical engineering, Electrical engineering, Electronic engineering, Information engineering |
| Scientific areas: | Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática Engineering and technology::Electrical engineering, Electronic engineering, Information engineering |
| URI: | https://hdl.handle.net/10216/85051 |
| Source: | Proceedings of the Design Automation and Test in Europe Conference - DATE'99 |
| Document Type: | Artigo em Livro de Atas de Conferência Internacional |
| Rights: | openAccess |
| License: | https://creativecommons.org/licenses/by-nc/4.0/ |
| Appears in Collections: | FEUP - Artigo em Livro de Atas de Conferência Internacional |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 65721.pdf | A Framework for System-Level Co-Verification Using the BST Infrastructure | 283.87 kB | Adobe PDF |  View/Open |
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