Please use this identifier to cite or link to this item: https://hdl.handle.net/10216/84659
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dc.creatorAndré V. Fidalgo
dc.creatorGustavo R. Alves
dc.creatorJosé M. Ferreira
dc.date.accessioned2019-02-01T18:30:38Z-
dc.date.available2019-02-01T18:30:38Z-
dc.date.issued2006
dc.identifier.othersigarra:58735
dc.identifier.urihttps://repositorio-aberto.up.pt/handle/10216/84659-
dc.description.abstractFault injection is frequently used for the verification and validation of dependable systems. When targeting real time microprocessor based systems the process becomes significantly more complex. This paper proposes two complementary solutions to improve real time fault injection campaign execution, both in terms of performance and capabilities. The methodology is based on the use of the on-chip debug mechanisms present in modern electronic devices. The main objective is the injection of faults in microprocessor memory elements with minimum delay and intrusiveness. Different configurations were implemented and compared in terms of performance gain and logic overhead.
dc.language.isoeng
dc.relation.ispartofProceedings of the 21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 06)
dc.rightsopenAccess
dc.rights.urihttps://creativecommons.org/licenses/by-nc/4.0/
dc.subjectEngenharia electrotécnica, electrónica e informática
dc.subjectElectrical engineering, Electronic engineering, Information engineering
dc.titleReal time fault injection using enhanced OCD - a performance analysis
dc.typeArtigo em Livro de Atas de Conferência Internacional
dc.contributor.uportoFaculdade de Engenharia
dc.identifier.doi10.1109/DFT.2006.51
dc.subject.fosCiências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática
dc.subject.fosEngineering and technology::Electrical engineering, Electronic engineering, Information engineering
Appears in Collections:FEUP - Artigo em Livro de Atas de Conferência Internacional

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