Please use this identifier to cite or link to this item:
https://hdl.handle.net/10216/84553| Author(s): | Gustavo R. Alves Manuel G. Gericota José L. Ramalho José M. M. Ferreira |
| Title: | HDL approach to board-level BIST |
| Issue Date: | 1993 |
| Abstract: | Boundary scan is now the most promising technology for testing high-complexity printed circuit boards. The number of BST components available to board-level designers is however still restricted, limiting the achievable fault coverage. The requirements to improve board-level testability are analyzed, and a corresponding set of testability building blocks are proposed. A high flexibility and reduced cost solution is described, which implements these blocks on medium-complexity PLDs using a simple and powerful HDL. |
| Subject: | Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática Electrical engineering, Electrical engineering, Electronic engineering, Information engineering |
| Scientific areas: | Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática Engineering and technology::Electrical engineering, Electronic engineering, Information engineering |
| URI: | https://repositorio-aberto.up.pt/handle/10216/84553 |
| Source: | Proceedings of the European Design Automation Conference |
| Document Type: | Artigo em Livro de Atas de Conferência Internacional |
| Rights: | openAccess |
| License: | https://creativecommons.org/licenses/by-nc/4.0/ |
| Appears in Collections: | FEUP - Artigo em Livro de Atas de Conferência Internacional |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 52337.pdf | An HDL Approach to Board-Level BIST | 369.68 kB | Adobe PDF |  View/Open |
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