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https://hdl.handle.net/10216/84044
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DC Field | Value | Language |
---|---|---|
dc.creator | José Martins Ferreira | |
dc.creator | André V. Fidalgo | |
dc.creator | Gustavo R. Alves | |
dc.date.accessioned | 2022-09-12T03:16:11Z | - |
dc.date.available | 2022-09-12T03:16:11Z | - |
dc.date.issued | 2006-06 | |
dc.identifier.other | sigarra:136091 | |
dc.identifier.uri | https://hdl.handle.net/10216/84044 | - |
dc.description.abstract | This paper presents a set of modifications to common processor on-chip debugging infrastructures to support the execution of fault injection campaigns. The proposed solution is applicable to different target architectures and imposes a very low logic overhead, providing a flexible and efficient mechanism for verifying and validating fault tolerant components. | |
dc.language.iso | eng | |
dc.rights | openAccess | |
dc.rights.uri | https://creativecommons.org/licenses/by-nc/4.0/ | |
dc.subject | Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática | |
dc.subject | Electrical engineering, Electrical engineering, Electronic engineering, Information engineering | |
dc.title | OCD-FI: On-Chip Debug and Fault Injection | |
dc.type | Poster em Conferência Internacional | |
dc.contributor.uporto | Faculdade de Engenharia | |
dc.subject.fos | Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática | |
dc.subject.fos | Engineering and technology::Electrical engineering, Electronic engineering, Information engineering | |
Appears in Collections: | FEUP - Poster em Conferência Internacional |
Files in This Item:
File | Description | Size | Format | |
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136091.pdf | 166.5 kB | Adobe PDF | View/Open |
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