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https://hdl.handle.net/10216/75047
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DC Field | Value | Language |
---|---|---|
dc.creator | Nuno Fonseca | |
dc.creator | Rui Camacho | |
dc.creator | Fernado Silva | |
dc.date.accessioned | 2022-09-11T18:42:33Z | - |
dc.date.available | 2022-09-11T18:42:33Z | - |
dc.date.issued | 2003 | |
dc.identifier.other | sigarra:64365 | |
dc.identifier.uri | https://hdl.handle.net/10216/75047 | - |
dc.description.abstract | In this paper we tackle the problems of eciency and scala- bility faced by Inductive Logic Programming (ILP) systems. We propose the use of parallelism to improve eciency and the use of an incremental batch learning to address the scalability problem. We describe a novel parallel algorithm that incorporates into ILP the method of incremen- tal batch learning. The theoretical complexity of the algorithm indicates that a linear speedup can be achieved. | |
dc.language.iso | eng | |
dc.relation.ispartof | 14th European Conference on Machine Learning (ECML 2003) | |
dc.rights | openAccess | |
dc.rights.uri | https://creativecommons.org/licenses/by-nc/4.0/ | |
dc.subject | Engenharia de computadores, Engenharia electrotécnica, electrónica e informática | |
dc.subject | Computer engineering, Electrical engineering, Electronic engineering, Information engineering | |
dc.title | A parallel ILP algorithm that incorporates incremental batch learning | |
dc.type | Artigo em Livro de Atas de Conferência Internacional | |
dc.contributor.uporto | Faculdade de Engenharia | |
dc.subject.fos | Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática | |
dc.subject.fos | Engineering and technology::Electrical engineering, Electronic engineering, Information engineering | |
Appears in Collections: | FEUP - Artigo em Livro de Atas de Conferência Internacional |
Files in This Item:
File | Description | Size | Format | |
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64365.pdf | A parallel ILP algorithm that incorporates incremental batch learning | 328.88 kB | Adobe PDF | View/Open |
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