Please use this identifier to cite or link to this item:
https://hdl.handle.net/10216/122196
Author(s): | Afonso de Sá Reis |
Title: | Accelerating the training of convolutional neural network |
Issue Date: | 2019-07-09 |
Description: | The objective of this report is to implement a Convolutional Neural Network (CNN) in an FPGA, with a main focus on accelerating the training, using Maxeler technology as a way to compile higher level code directly into hardware.Neural Networks are one of the most commonly used models used in all sorts of tasks in Machine Learning. This type of network is mostly used for image recognition/generation, since a few layers ( convolutional, pooling) can be viewed as image operations to find features, which are then combined in the fully connected layer(s) and used to produce the output. |
Subject: | Engenharia electrotécnica, electrónica e informática Electrical engineering, Electronic engineering, Information engineering |
Scientific areas: | Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática Engineering and technology::Electrical engineering, Electronic engineering, Information engineering |
TID identifier: | 202388611 |
URI: | https://hdl.handle.net/10216/122196 |
Document Type: | Dissertação |
Rights: | openAccess |
Appears in Collections: | FEUP - Dissertação |
Files in This Item:
File | Description | Size | Format | |
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350787.pdf | Accelerating the training of convolutional neural network | 1.87 MB | Adobe PDF | View/Open |
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